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Averest

Averest is a framework for the model-based design of reactive systems that supports the specification, verification, and implementation. It contains a simulator, support for formal verification with temporal logics, and various transformations for hardware and software synthesis of embedded reactive systems or pure hardware circuits. It is developed by the Embedded Systems Group at the RPTU in Kaiserslautern. For more information, see http://www.averest.org, and for contacting us send an email to Klaus.Schneider@rptu.de.

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Activity

Latest release
2mo ago
Total releases
29
Cadence
~32 days
Last 12 months
13

Details

License
unknown
First release
Jun 03, 2022
Releases
Version Released
3.6.6 patch
3.6.5 patch
3.6.4 patch
3.6.3 patch
3.6.2 patch
3.6.1 patch
3.6.0 minor
3.5.2 patch
3.5.1 patch
3.5.0 minor
3.4.5 patch
3.4.4 patch
3.4.3 patch
3.4.2 patch
3.4.1 patch
3.4.0 minor
3.3.0 minor
3.2.1 minor
3.1.1 patch
3.1.0 minor
3.0.8 patch
3.0.7 patch
3.0.6 patch
3.0.5 patch
3.0.4 patch
3.0.3 patch
3.0.2 patch
3.0.1 patch
3.0.0 initial