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cargo

reticle

A from-scratch VHDL / Verilog compiler in pure Rust: frontends, a unified IR, simulation, synthesis and FPGA/ASIC backends, with first-class IP integration.

cargo View on Cargo

Activity

Latest release
1w ago
Total releases
8
Cadence
~daily
Last 12 months
8

Reach

Downloads
347

Details

License
MIT
First release
Sep 22, 2026
Releases
Version Released
0.0.7 patch
0.0.6 patch
0.0.5 patch
0.0.4 patch
0.0.3 patch
0.0.2 patch
0.0.1 patch
0.0.0 initial